1. Field of Invention
The present invention relates to a memory device, fabrication method of the memory device and operation of the memory device. More particularly, the present invention relates to a non-volatile memory device, fabrication method of the non-volatile memory device and operation of the non-volatile memory device.
2. Description of Related Art
The non-volatile memory device has the advantages of multiple operations of write, read and erase data on it, and the data stored in it will not disappear while the power is off. Therefore, the non-volatile memory device has been widely used in personal computer and the electronic equipment.
The typical non-volatile memory device usually uses the doped polysilicon to form the floating gate and the control gate over the floating gate. In addition, the floating gate and the control gate are separated by an inter-gate dielectric layer, and the floating gate and the substrate are separated by a tunneling layer. Moreover, the source region and the drain region are disposed in the substrate at both sides of the control gate.
When the memory device is performed with the operation of writing data, it is that the control gate, the source region and the drain region are applied with voltages, so as to inject electrons into the floating gate. When memory device is performed with the operation of reading data, it is that the control gate is applied an operation voltage. At this moment, the charging state of the floating gate affects the channel under the floating gate about on/off. The on/off state of channel is used for judgment in reading the data as 0 or 1. When the memory device is performed with the operation of erasing data, it is that the substrate, the source region, the drain region, or the control gate is applied with a relative high voltage, so as to cause the electrons to flow from the floating gate, pass through the tunneling layer, and be ejected to the substrate by the tunneling effect, known as the substrate erase, or flow through the inter-gate dielectric layer and be ejected to control gate.